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As a charitable Service based non-profit organization (NPO) educating and connecting the High Performance Computing user community to state of art technology for the purpose of Optimizing business processes and workforce advancement. Our technology focus includes AI, Cloud Computing, Data Science, Deep learning, Machine learning and visualization utilized in applications ranging from Manufacturing and Engineering, Financial services, Life Sciences, Energy, Academia and Government.

Lunch and Learn - April 2018 - Download Presentation! - - Using FPGAs for Computation

27 Apr 2018 1:42 PM | SHPCP (Administrator)

The Society of HPC Professionals

A Lunch & Learn Round Table Discussion Meeting

Using FPGAs for Computation;
An Overview of the Current State of The Art in Xilinx Chips and Tools


In this tutorial session you will learn about the current families of Xilinx FPGAs and SOCs combining multiprocessor systems with FPGA fabric and the tools that support them. The session will cover the capabilities of the current 7 Series, UltraScale and UltraScale+ FPGAs as well as the Zynq and Zynq UltraScale+ SoCs.

The software tools that support the chips will be covered with an emphasis on the higher level design entry tools supporting reconfigurable acceleration by creating FPGA designs from the C family of languages. Finally, we will learn about the libraries supporting FPGA based computational acceleration and the AWS FPGA instances.

Presenter’s Bio:

John McCaskill - President

John McCaskill is the President and an owner of Faster Technology, LLC which is both a Xilinx Alliance Partner, and the exclusive Xilinx Authorized Training Provider for eight states. He designs FPGA based products in addition to providing training for Xilinx FPGA and software and design services for FPGA related projects.

Mr. McCaskill has previously worked at Polycom working with audio signal processing and was granted a patent for automatic camera tracking of speakers using beam forming. Prior to that, he worked at Texas Memory Systems where he designed and wrote software for vector processors. He graduated from the University of Texas at Austin with a BS in Electrical Engineering.









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